In general, a semiconductor memory device receives a power supply voltage VDD and a ground voltage VSS from an external source and generates internal voltages necessary for internal operations. Examples of the internal voltages include a core voltage VCORE supplied to a core region, a peripheral voltage VPERI supplied to a peripheral region, a high voltage VPP used to drive a word line or used in an overdriving operation, and a back bias voltage VBB supplied to a silicon substrate or a bulk.
Herein, the core voltage VCORE is generated by decreasing the external power supply voltage VDD to a predetermined level; the high voltage VPP has a higher level than the external power supply voltage VDD; and the back bias voltage VBB maintains a lower level than the external ground voltage VSS. Therefore, a charge pump circuit is necessary to supply charges to supply the high voltage VPP and the back bias voltage VBB.
The back bias voltage VBB is supplied to a bulk or a silicon substrate of the semiconductor memory device to stabilize an operation of the semiconductor memory device.
The back bias voltage VBB prevents a PN junction of a transistor of the semiconductor memory device from being forward-biased, thus preventing a latch-up phenomenon and a data loss of a memory cell. Also, the back bias voltage VBB prevents a threshold voltage of a transistor from changing due to a back gate effect, thus stabilizing the semiconductor memory device. Also, the back bias voltage VBB increases the level of a threshold voltage of a transistor, thus reducing the quantity of leakage current generated at the threshold voltage.
The back bias voltage VBB is maintained at a constant level (e.g., −0.8 V) independent of temperature changes. However, the level of the threshold voltage increases with decreasing temperature.
Thus, when a back bias voltage remaining constant from room to low temperature is provided to a transistor in a semiconductor memory device operating at low temperature, the threshold voltage would increase too high and prevent a sufficient charge transfer through the transistor.
In particular, a back bias voltage VBB is provided to control the threshold voltage of a cell transistor in a semiconductor memory device including MOS transistors. However, the threshold voltage of the cell transistor would increase too high at low temperature, and it would thus prevent sufficient charge sharing between the cell transistor and a bit line. Thus, when the semiconductor memory device performs an active operation at low temperature, a bit line sense amplifier senses and amplifies the bit line, which fails to share sufficient charges with the cell capacitor, thus causing a sensing failure.